ANV

Debugging

Here are a few environment variable debug environment variables specific to ANV:

ANV_ENABLE_GENERATED_INDIRECT_DRAWS

If defined to 0 or false, this will disable the generated indirect draw optimization in Anv. This will only affect Gfx11+.

ANV_ENABLE_PIPELINE_CACHE

If defined to 0 or false, this will disable pipeline caching, forcing ANV to reparse and recompile any VkShaderModule (SPIRV) it is given.

ANV_DISABLE_SECONDARY_CMD_BUFFER_CALLS

If defined to 1 or true, this will prevent usage of self modifying command buffers to implement vkCmdExecuteCommands. As a result of this, it will also disable VK_KHR_performance_query.

ANV_ALWAYS_BINDLESS

If defined to 1 or true, this forces all descriptor sets to use the internal Bindless model.

ANV_QUEUE_THREAD_DISABLE

If defined to 1 or true, this disables support for timeline semaphores.

ANV_USERSPACE_RELOCS

If defined to 1 or true, this forces ANV to always do kernel relocations in command buffers. This should only have an effect on hardware that doesn’t support soft-pinning (Ivybridge, Haswell, Cherryview).

ANV_PRIMITIVE_REPLICATION_MAX_VIEWS

Specifies up to how many view shaders can be lowered to handle VK_KHR_multiview. Beyond this number, multiview is implemented using instanced rendering. If unspecified, the value default to 2.

Experimental features

ANV_EXPERIMENTAL_NV_MESH_SHADER

If defined to 1 or true, this advertise support for VK_NV_mesh_shader extension for platforms that have hardware support for it.

Binding Model

Here is the ANV bindless binding model that was implemented for the descriptor indexing feature of Vulkan 1.2 :

The HW binding table is generated when the draw or dispatch commands are emitted. Here are the types of entries one can find in the binding table :

• The currently bound descriptor sets, one entry per descriptor set (our limit is 8).

• For dynamic buffers, one entry per dynamic buffer.

• For draw commands, render target entries if needed.

The entries of the HW binding table for descriptor sets are RENDER_SURFACE_STATE similar to what you would have for a normal uniform buffer. The shader will emit reads this buffer first to get the information it needs to access a surface/sampler/etc… and then emits the appropriate message using the information gathered from the descriptor set buffer.

Each binding type entry gets an associated structure in memory (anv_storage_image_descriptor, anv_sampled_image_descriptor, anv_address_range_descriptor, anv_storage_image_descriptor). This is the information read by the shader.

Descriptor Set Memory Layout

Here is a representation of how the descriptor set bindings, with each elements in each binding is mapped to a the descriptor set memory :

Each Binding in the descriptor set is allocated an array of anv_*_descriptor data structure. The type of anv_*_descriptor used for a binding is selected based on the VkDescriptorType of the bindings.

The value of anv_descriptor_set_binding_layout::descriptor_offset is a byte offset from the descriptor set memory to the associated binding. anv_descriptor_set_binding_layout::array_size is the number of anv_*_descriptor elements in the descriptor set memory from that offset for the binding.

Pipeline state emission

Vulkan initially started by baking as much state as possible in pipelines. But extension after extension, more and more state has become potentially dynamic.

ANV tries to limit the amount of time an instruction has to be packed to reprogram part of the 3D pipeline state. The packing is happening in 2 places :

• genX_pipeline.c where the non dynamic state is emitted in the pipeline batch. This batch is copied into the command buffer batch when calling vkCmdBindPipeline()

• genX_cmd_buffer.c in the cmd_buffer_flush_state function which ends up calling into gfx8_cmd_buffer.c & gfx7_cmd_buffer.c

The rule to know where to emit an instruction programming the 3D pipeline is as follow :

• If any field of the instruction can be made dynamic, it should be emitted in genX_cmd_buffer.c, gfx8_cmd_buffer.c or gfx7_cmd_buffer.c

• Otherwise, the instruction can be emitted in genX_pipeline.c

When a piece of state programming is dynamic, it should have a corresponding field in anv_dynamic_state and the anv_dynamic_state_copy() function should be updated to ensure we minimize the amount of time an instruction should be emitted. Each instruction should have a associated ANV_CMD_DIRTY_* mask so that the dynamic emission code can tell when to re-emit an instruction.

An instruction can also be re-emitted when a pipeline changes by checking for ANV_CMD_DIRTY_PIPELINE. It should only do so if it requires to know some value that is coming from the anv_graphics_pipeline object that is not available from anv_dynamic_state.

Generated indirect draws optimization

Indirect draws have traditionally been implemented on Intel HW by loading the indirect parameters from memory into HW registers using the command streamer’s MI_LOAD_REGISTER_MEM instruction before dispatching a draw call to the 3D pipeline.

On recent products, it was found that the command streamer is showing as performance bottleneck, because it cannot dispatch draw calls fast enough to keep the 3D pipeline busy.

The solution to this problem is to change the way we deal with indirect draws. Instead of loading HW registers with values using the command streamer, we generate entire set of 3DPRIMITIVE instructions using a shader. The generated instructions contain the entire draw call parameters. This way the command streamer executes only 3DPRIMITIVE instructions and doesn´t do any data loading from memory or touch HW registers, feeding the 3D pipeline as fast as it can.

In Anv this implemented by using a side batch buffer. When Anv encounters the first indirect draws, it generates a jump into the side batch, the side batch contains a draw call using a generation shader for each indirect draw. We keep adding on more generation draws into the batch until we have to stop due to command buffer end, secondary command buffer calls or a barrier containing the access flag VK_ACCESS_INDIRECT_COMMAND_READ_BIT. The side batch buffer jump back right after the instruction where it was called.